HW/SW co-design assumes concurrent development of software and hardware which means that different parts of the system a
re developed in parallel to be integrated in the product. Even when much care has been taken to define good HW/SW interfaces and
to analyse/evaluate specification and architectural decomposition, it is likely that a number of unforeseen problems remain in the
system conception and design due to:
These problems need to be uncovered and addressed as soon as possible, to minimise cost and delays due to rework after integration
Therefore methods for risk analysis, model-based testing, simulation techniques - and more generally of early prevention of integrations problems are a key imperative of HW/SW co-design
Following table lists all TWINS solutions and experience reports that address this co-design imperative.
| ESSENTIAL ACTIVITIES |
CO-DESIGN IMPERATIVE: Early Prevention of Integration Problems |
| Requirements Management |
Disambiguating Requirements |
| Solutions |
This supervisory control for hybrid systems facilitates formalization of requirements, which, in turn, helps communicating the requirements between professionals with background in different disciplines
More details on the solution pages: 1, 2, 3, 4, 5
The HoR methodology allows the developers and testers: to define and classify the requirements, to know the traceability of the requirements, to have a model of interrelation of requirement in cases of codesign of hardware and software, that permits to know the implications among requirements of changing one of them, to have a method to show the clients the implication of changing requirements along the design process
More details on the solution page
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| Experience Reports |
The HoR methodology allows the developers and testers: to define and classify the requirements, to know the traceability of the requirements, to have a model of interrelation of requirement in cases of codesign of hardware and software, that permits to know the implications among requirements of changing one of them, to have a method to show the clients the implication of changing requirements along the design process
More details on the solution page
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| Architecture |
Architectural Consistency |
| Solutions |
Scaleo EasyTLMtranslator - SPIRIT is a standard that prevents mistakes in HW interconnections
Murphy provides a mechanism for early uncovering of problems resulting from assumptions that underly architectural decisions (assumptions that engineers of one discipline make about other discipline, customers... that eventually prove to be untrue)
More details on the solution page
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| Experience Reports |
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| HW/SW simulation & emulation |
Resource Management |
| Solutions |
The SystemC TLM/TLM-T Simulation Platform facilitates the use of the SystemC standard for the rapid design of software/hardware system prototypes and a more extensive design space exploration
More details on the solution page
Set-up to test printer control software against a model of the physical engine
A tool/environment to simulate the part of a printer that creates the toner image and puts it on paper
A prototype visualization tool for a test environment, with which software testers can follow the sheet behaviour in a simulated print engine and can manually influence the objects in the simulated paper path
A visualization tool for a simulation environment, with which software testers visually observe the behavior of a simulated print engine
A visualization tool for a simulation environment, with which software testers visually interact with the behavior of a simulated print engine
A step motor emulation in FPGA has been developed to use in a hardware-in-the-loop simulation instead of real step motors
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| Experience Reports |
The SystemC TLM/TLM-T Simulation Platform facilitates the use of the SystemC standard for the rapid design of software/hardware system prototypes and a more extensive design space exploration
More details on the experience report pages: 1, 2, 3
A tool/environment to simulate the part of a printer that creates the toner image and puts it on paper
|
| Verification and validation |
Model Based Checking and Testing |
| Solutions |
The automatic test generation for SystemC models constructs a reference set of functional test-cases, based on coverage of the behaviour of a high-level functional model of the whole hardware/software system, which can then be used to check the preservation of functional behaviour (non-regression) in the subsequent SystemC models
More details on the solution page
This supervisory control for hybrid systems involves automated generation of control software which by construction satisfies the requirements
More details on the solution pages: 1, 2, 3, 4, 5
Set-up to test printer control software against a model of the physical engine
A tool/environment to simulate the part of a printer that creates the toner image and puts it on paper
A prototype visualization tool for a test environment, with which software testers can follow the sheet behaviour in a simulated print engine and can manually influence the objects in the simulated paper path
A visualization tool for a simulation environment, with which software testers visually observe the behavior of a simulated print engine
A visualization tool for a simulation environment, with which software testers visually interact with the behavior of a simulated print engine
A step motor emulation in FPGA has been developed to use in a hardware-in-the-loop simulation instead of real step motors
Breadth-Bounded Model Checking: a method based on randomised explicit state space exploration techniques, in which we rely on our algorithm to generate a state space that is a simulation of the full state space
More details on the solution page
Analysis of Boolean Equation Systems through Structure Graphs: Simplifying an Boolean equation systems through minimisation of their structure graphs
More details on the solution page
A co-simulation environment for testing an advanced current measurement instrument that makes use of an embedded of-the-shelf MCU. The co-simulation environment is setup using a VHDL IDE and the IDE software of the MCU vendor. The advanced current measurement system is successfully co-simulated with this flow. The framework significantly decreases firmware design time and significantly improves test quality and product reliability
More details on the solution page
TestWORKFLOW is a tool designed to support the entire software validation process, assisting the user in automated testing and the management of requirements, tests and documentation. Traceability is provided throughout the process, on account of the recorded relationships between test cases, requirements and executions
More details on the solution page
The automatic unit test generation for C++ programs constructs a set of structural test-cases which guarantees coverage of the program's behaviour
More details on the solution page
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| Experience Reports |
A tool/environment to simulate the part of a printer that creates the toner image and puts it on paper
A co-simulation environment for testing an advanced current measurement instrument that makes use of an embedded of-the-shelf MCU. The co-simulation environment is setup using a VHDL IDE and the IDE software of the MCU vendor. The advanced current measurement system is successfully co-simulated with this flow. The framework significantly decreases firmware design time and significantly improves test quality and product reliability
More details on the solution page
TestWORKFLOW is a tool designed to support the entire software validation process, assisting the user in automated testing and the management of requirements, tests and documentation. Traceability is provided throughout the process, on account of the recorded relationships between test cases, requirements and executions
More details on the solution page
The automatic unit test generation for C++ programs constructs a set of structural test-cases which guarantees coverage of the program's behaviour
More details on the solution page
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| Management |
Risk Analysis |
| Solutions |
Murphy aims to assist companies in managing the risk of failures during hardware software co-design. It offers two complementary methods: (a) upfront failure analysis and modeling (b) continuous observation and risk analysis of development activities in rendezvous points and risk areas
More details on the solution page
The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation
More details on the solution page
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| Experience Reports |
The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation
More details on the solution page
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