Co-Design Imperative: Making HW/SW Tradeoffs

In co-design, we must allocate functionality to hardware or software (also called partitioning).
The allocation must satisfy requirements defined on the overall resulting system, such as cost, response time, maintainability, flexibility, time to market
For a given functionality of the system, SW and HW solutions may each have advantages and disadvantages, which must be traded off against each other
We must find a "good-enough" allocation which does not take too much effort to find but which satisfies the requirements

Being able to continuously identify and make these tradeoffs is a key imperative of co-design

Following table lists all TWINS solutions and experience reports that address this co-design imperative.

ESSENTIAL ACTIVITIES	CO-DESIGN IMPERATIVE: Making HW/SW Tradeoffs
Requirements Management	HW/SW Trade off criteria
Solutions	Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page
Experience Reports	Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page
Architecture	Partitioning
Solutions	Test and design for test "The main objectives of the method are to exploit the DFT and ePHM features introduced into the design during the design phase to their full extent in the validation, verification and test phase; and are to improve the test process. Making use of and ensuring that the prognostics and DFT provisions are properly used, considerably reduce test efforts and test time and contribute to quality and reliability assurance with minimal development costs" More details on the solution page Implementation and Application of Prognostics The objective of the method is to identify precursors to product/system failure. On base of this information define criteria to assess reliability and health of the product throughout its lifetime. In order to do so, include the necessary test observation HW/SW into the design. This is done based on a set of Electronic prognostics health management (ePHM) guidelines and the transfer of know-how and providing guidance for the improvement of existing tools and the development of new tools More details on the solution page Test methodology implementation The objective of the method is to make the design better testable and to introduce the aspect of test as soon as possible in the design cycle and development flow. This is done based on a set of DFT guidelines and the transfer of know-how and providing guidance for the improvement of existing tools and the development of new tools. More details on the solution page
Experience Reports	Test and design for test "The main objectives of the method are to exploit the DFT and ePHM features introduced into the design during the design phase to their full extent in the validation, verification and test phase; and are to improve the test process. Making use of and ensuring that the prognostics and DFT provisions are properly used, considerably reduce test efforts and test time and contribute to quality and reliability assurance with minimal development costs" More details on the experience report pages: 1, 2, 3, 4, 5 Test methodology implementation The objective of the method is to make the design better testable and to introduce the aspect of test as soon as possible in the design cycle and development flow. This is done based on a set of DFT guidelines and the transfer of know-how and providing guidance for the improvement of existing tools and the development of new tools. More details on the experience report pages: 1, 2, 3, 4, 5 Schneider-Electric SystemC CABA models Use Case Schneider-Electric experienced the use of SystemC CABA models to ease HW/SW partitioning
HW/SW simulation & emulation	Architectural Exploration
Solutions	Scaleo easyTLMintegrator Scaleo easyTLMintegrator is a methodology to integrate in a FPGA a new IP starting from its systemC description. It eases the validation of an architecture on a low cost prototype SystemC TLM/TLM-T Simulation Platform SystemC TLM/TLM-T Simulation Platform facilitates the use of the SystemC standard for the rapid design of software/hardware system prototypes and a more extensive design space exploration More details on the solution page Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page Co-simulation Environment for an Advanced Current Measurement Application A co-simulation environment for testing an advanced current measurement instrument that makes use of an embedded of-the-shelf MCU. The co-simulation environment is setup using a VHDL IDE and the IDE software of the MCU vendor. The advanced current measurement system is successfully co-simulated with this flow. The framework significantly decreases firmware design time and significantly improves test quality and product reliability More details on the solution page
Experience Reports	Scaleo easyTLMintegrator Scaleo easyTLMintegrator is a methodology to integrate in a FPGA a new IP starting from its systemC description. It eases the validation of an architecture on a low cost prototype SystemC TLM/TLM-T Simulation Platform SystemC TLM/TLM-T Simulation Platform facilitates the use of the SystemC standard for the rapid design of software/hardware system prototypes and a more extensive design space exploration More details on the experience report pages: 1, 2, 3 Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page Co-simulation Environment for an Advanced Current Measurement Application A co-simulation environment for testing an advanced current measurement instrument that makes use of an embedded of-the-shelf MCU. The co-simulation environment is setup using a VHDL IDE and the IDE software of the MCU vendor. The advanced current measurement system is successfully co-simulated with this flow. The framework significantly decreases firmware design time and significantly improves test quality and product reliability More details on the solution page
Verification and validation	Identification of Conflicts
Solutions	Fixing Reliability Issues of Existing Thermal Printer Electronics The issues with this thermal printer were successfully solved. The key to the solution was proper documentation, improving design quality, the introduction of DFT structures and last but not least, proper coaching and cooperation of interdisciplinary design teams More details on the solution page Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page
Experience Reports	Fixing Reliability Issues of Existing Thermal Printer Electronics The issues with this thermal printer were successfully solved. The key to the solution was proper documentation, improving design quality, the introduction of DFT structures and last but not least, proper coaching and cooperation of interdisciplinary design teams More details on the solution page Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page
Management	Rendezvous Points
Solutions	Mobase, multidisciplinary model based engineering framework The MoBasE (model based engineering) framework provides an information model that describes the multidisciplinary design Fixing Reliability Issues of Existing Thermal Printer Electronics The issues with this thermal printer were successfully solved. The key to the solution was proper documentation, improving design quality, the introduction of DFT structures and last but not least, proper coaching and cooperation of interdisciplinary design teams More details on the solution page Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page
Experience Reports	Fixing Reliability Issues of Existing Thermal Printer Electronics The issues with this thermal printer were successfully solved. The key to the solution was proper documentation, improving design quality, the introduction of DFT structures and last but not least, proper coaching and cooperation of interdisciplinary design teams More details on the solution page Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk The objective of the approach was to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. A clear rendezvous point was created to ensure seamless inter-team operation More details on the solution page