Exploiting System Re-configurability to Minimize HW/SW Co-Design Risk

Consider a system that consists of a hardware and a software layer and whereby the HW layer makes use of programmable building blocks. The objective of the approach documented is to exploit the re-configurability of a programmable part being present in the system to verify/debug/optimize as much as possible the HW part of the system without the need for the final (embedded) SW part to be ready. To do so the basic functionality of the system that will be exploited by the embedded SW, to be developed by the SW team, is identified. Firmware is developed that mimics the functionality identified and placed in an easy to manage smaller microcontroller developed by the HW team. As such all the bugs present in the HW part (analog as well as digital) can be fully debugged by the time the advanced SW part needs to be introduced and tested. This approach reduces the co-design risk as a clear and uniform rendezvous point is defined between both domains in the form of transferring/copying identical communication functionality from one domain to the other. It also shortens time to market as both the HW and SW teams can work concurrently. By the time the SW is ready for debugging, the HW can be fully debugged decreasing the complexity of inter-domain system bugs. This approach has been successfully implemented and the system specification characterization was fully done by the time the first software shakedown occurred. This enabled also an early datasheet hardware specification section completion as well.

see attaced report

Position in the Domain

see attached document

Used Methofds and Tools

TE-WP2-QST-1-S1;TE-WP3-QST-1-S1

Experience

  • Cost saving was considerable
  • Time-to-market was considerablly improved
  • Reusability was considerablly improved
  • Quality was considerablly improved

AttachmentSize
TWINS_Solution_4.pdf63.4 KB
Domain_Workflow_ER_4.pdf76.53 KB